Fully parallel programming on 1k graphene interfacial memristor crossbar array for edge computing

Fine-tuning pre-trained neural networks in resource-constrained environments demands ultra-low-power hardware capable of real-time response. Filamentary memristors show great promise in neural networks inference but suffer from stochastic switching, undesirable for fine-tuning. While non-filamentary memristors feature more deterministic switching, they are limited by slow writes (> 100 µs), poor retention (< 10 ⁴ s), and low on/off ratios (< 100). Through device-circuit-system co-design, we engineer a metal-insulator-graphene (MIG) non-filamentary memristor with graphene electrodes for hysteresis-enhanced switching, achieving 50-µs writes, > 1-year retention, > 5,000 on/off ratio, and linear, symmetric conductance tuning under identical pulses. We elucidate switching mechanisms and build a physics-based compact model for circuit design. A parallel outer-product programming scheme is proposed to enable stochastic gradient descent across the whole crossbar array simultaneously. This scheme is validated on isolated devices and a 6×6 subarray within a 32×32 array with 92% yield. Based on this scheme, a reconfigurable architecture is designed that enables fine-tuning of four convolutional neural networks (CNNs) on CIFAR-10 in under 6 s and 0.2 J, achieving near–floating-point accuracy on two of the networks. Our platform unlocks real-time edge intelligence, revolutionizing autonomous and pervasive computing with high energy efficiency.