A Low Power BiCMOS Transimpedance Amplifier with Stable Input Impedance up to 50 GHz Designed for Large-Area Detectors

This paper presents a novel design methodology for a transimpedance amplifier (TIA) featuring low input resistance. The low input resistance of the proposed TIA is achieved through the implementation of various analog circuit techniques, such as the regulated cascode (RGC) and flip voltage follower (FVF), further enhanced by the advantages of BiCMOS technology. A key characteristic of the proposed design is its ability to maintain a consistently low input impedance across high frequencies without exhibiting inductive behavior or negative resistance, which are common limitations in conventional TIAs. The combination of low input impedance and the absence of inductive behavior makes the TIA a strong candidate for front-end readouts of large-area sensors. The large sensor capacitance can degrade performance; however, a low-impedance readout mitigates this effect. If the impedance were inductive, it could resonate with the sensor’s capacitance, causing instability. The proposed TIA effectively addresses both concerns by maintaining low input impedance without introducing inductive behavior. Another notable feature of the proposed TIA is its self-biased architecture, which simplifies the implementation of bipolar transistors, making the circuit more reliable and easier to integrate. The circuit is designed and implemented in IHP-GmbH 130 nm BiCMOS technology. Simulation results validate the performance of the proposed TIA, demonstrating an input resistance of 50 Ω (over the range of 50 GHz), a bandwidth of 710 MHz (with a 10 pF detector capacitor), and a power consumption of 3.4 mW.