Heterogeneous 2D Memristor Array and Silicon Selector for Compute-in-Memory Hardware in Convolution Neural Networks

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Abstract

Memristor crossbar arrays (CBAs) based on two-dimensional (2D) materials have emerged as a potential solution to overcome the limitations of energy consumption and latency associated with the conventional von Neumann architecture. However, current 2D memristor CBAs encounter specific challenges such as limited array size, high sneak path current, and lack of integration with peripheral circuits for hardware compute-in-memory (CIM) systems. In this work, we demonstrate a novel hardware CIM system that leverages the heterogeneous integration of scalable 2D hafnium diselenide (HfSe2) memristors and silicon (Si) selectors, as well as the integration between memristive CBAs and peripheral control-sensing circuits. The integrated 32 × 32 one-selector-one-memristor (1S1R) array effectively mitigates sneak current, exhibiting a high yield (89%) with notable uniformity. The integrated CBA demonstrates exceptional improvement of energy efficiency and response time comparable to state-of-the-art 2D materials-based memristors. To take advantage of low latency devices for achieving low energy systems, time-domain sensing circuits with the CBA are used, of which the power consumption surpasses that of analog-to-digital converters (ADCs) by 2.5 folds. Moreover, the implemented full-hardware binary convolution neural network (CNN) achieves remarkable accuracy (97.5%) in a pattern recognition task. Additionally, analog computing and in-built activation functions are demonstrated within the system, further augmenting energy efficiency. This silicon-compatible heterogeneous integration approach, along with the energy-efficient CIM system, presents a promising hardware solution for artificial intelligence (AI) applications.

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