Development and Optimization of a 10-Stage Solid-State Linear Transformer Driver

This work details the development of a 10-stage solid-stage linear transformer driver (SSLTD) capable of producing 24 kV, 1 kA pulses with a rise-time of ∼ 10 ns utilizing SiC MOSFET switches. Throughout the development process, various design parameters were investigated for their influence on the LTD performance. Among these considerations was an evaluation of the behavior of several nanocrystalline magnetic core materials subject to high voltage pulsed conditions, with an emphasis on minimizing energy losses. Other design parameter of interest lies in the physical layout of the LTD structure, particularly the diameter of the central stalk and the dielectric material, which together define the characteristics of the coaxial transmission line, as well as the overall height of each stage. The influence of each of these parameters was weighed to optimize the final design for fastest output pulse rise-time, highest efficiency, and cleanest output pulse waveform profile across varying load resistance. This work also introduces a pulsed reset technique, where repetition-rated burst testing was used to find the maximum operational frequency of the LTD without driving the magnetic cores into saturation.