Instruction-Level Exploratory Testing Framework for ARMv8-A Processors

Instruction-level testing of modern processors is increasingly challenged by the presence of undocumented and weakly specified behaviors. This paper presents an instruction-level testing framework designed to expose and characterize these undocumented behaviors on ARMv8-A processors. The framework systematically generates instruction streams, executes them in isolation, and observes their effects through multiple weak oracles , including register state differences and performance monitoring events. To rigorously verify control-flow integrity, the method employs a sentinel-guarded memory layout combined with trap-based fall-through verification, utilizing signal contexts to quantify program counter deviations. Implemented on the RK3399 platform, the method exhaustively screened over 1.2 billion architecturally undefined encodings. Experimental results categorize the observed behaviors into distinct functional classes. While primarily designed for testing and characterization, the observed behaviors provide insights for improving processor reliability and architectural documentation.