An Efficient and Low Power SPAD Based Quantum Random Number Generator Using NLFSR for Secure Cryptographic Applications

Random number generation plays a crucial role in modern cryptographic systems , where true randomness is required for secure key generation and data protection. Conventional pseudo random generators lack sufficient entropy and introduce predictability. Quantum Random Number Generators (QRNGs), based on quantum phenomena such as single photon detection and offer enhanced unpredictability and security. In this work, we present the design and hardware realization of a SPAD (Single Photon Avalanche Diode) based Quantum Random Number Generator using a complete RTL to GDS flow. A behavioural Verilog model of SPAD operation was developed, introducing photon pulse detection, dead time effects, and noise-based entropy monitoring. The design was simulated using several EDA tools are utilized to validate functionality. Subsequently, the RTL was Synthesized, Placed, Routed and verified to generate a GDSII layout. The proposed implementation demonstrates a feasible pathway for integrating quantum enhanced random ness into secure hardware systems. The RTL to GDSII realization confirms suitability for Application Specific Integration Circuit (ASIC) fabrication, enabling cryptographic applications such as Quantum Key Distribution (QKD) and hardware security module for low power circuits. By using Non-linear feedback shift Register (NLFSR) to enhance randomness extraction and output Bit rates. robust randomness statistics verified by NIST test, and a total power consumption of only 0.272 m Watts substantially lower than 1 conventional CMOS random number generators. This work establishes a scal-able framework for future quantum entropy sources in Secure embedded systems, validated by complete timing, power and random ness test results.