A gem5-based framework for analyzing IoT microcontrollers with peripherals and firmware

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Abstract

The rapid proliferation of Internet of Things (IoT) devices imposes stringent demands on energy efficiency, real-time responsiveness, and security, which traditional simulation approaches often fail to address due to their limited ability to capture microarchitectural interactions. This paper introduces Gem5-ML, a gem5-based framework extended with IoT-specific processor, memory, and peripheral models, coupled with machine learning (ML) to accelerate design-space exploration. Representative workloads including sensing, control, communication, and lightweight security kernels are executed in SE mode to collect fine-grained microarchitectural statistics such as cache activity, bus contention, interrupt latency, and execution cycles. These features are used to train surrogate ML models that enable fast and accurate prediction of performance and energy trade-offs, reducing exploration time by up to 10× while maintaining over 90% Pareto front coverage. The framework also incorporates anomaly detection mechanisms capable of identifying reliability issues such as interrupt storms, cache thrashing, and voltage droop with high accuracy. Experimental results demonstrate that Gem5-ML achieves efficient exploration, robust prediction, and actionable insights for energy-aware and secure IoT microcontroller design, highlighting its potential as a scalable methodology for next-generation low-power and resilient embedded systems.

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