Understanding and Modelling of the Advanced Transistor at Extremely Scaled Channel Length using Virtual Source Model

Moore's law sums up the rate of progress in information technology. However, with the increase of line density on silicon wafer, its complexity and error rate will also increase exponentially. The semiconductor devices of current technology will not work properly, and Moore's Law will come to an end. the traditional model of DriftDiffiusion Transportation Regime for long channel device is not suitable for nanometerscaled device anymore. Nowadays, the research to extend Moore’s law for extremelyscaled channel length transisitors is a big challenge. Silicon MIT Virtual Source Model provides a new model to describe the key parameters of ultra-short channel MOSFET using Quasi-Ballistic Transport Regime. And through this model, the effect of ultrashort channel NMOSFET on FD-SOI with strained silicon technology including both biaxial and uniaxial strain can be analyzed to obtain some key electrical parameters, such as effective channel electron mobility and virtual source velocity which will have a great contribution to enhance the performance of advanced transistors. The project has built several 30 nm short channel FD-SOI NMOSFET models with different types and values of strain through Sentaurus TCAD simulation tool, some measurable and fitting parameters have been obtained in our project by using VS model in MATLAB. Through the trend of function that describe key parameters versus strain value, we can explore how strained silicon on FD-SOI structure can influence the performance of ultra-short channel NMOSFET and make a prediction and benchmark for the future research aiming at improving advanced transistors performance.