Direct Bonding of 6-inch SiC/Si Wafer with Enhanced Thermal Interface

Silicon (Si)-based complementary metal-oxide-semiconductor (CMOS) technology dominates the semiconductor industry but faces fundamental limitations in high-temperature and high-power applications due to its low thermal conductivity and narrow bandgap. Heterogeneous integration with silicon carbide (SiC), a wide-bandgap semiconductor with superior thermal properties, offers a promising path forward. However, the substantial lattice mismatch between 4H-SiC and Si presents challenges for epitaxial growth, and hydrophilic direct bonding often results in the formation of an interfacial oxide layer that severely degrades interface thermal conductivity across the interface. Here, we report a surface activation bonding (SAB) strategy, combined with controlled post-bonding annealing, to fabricate high-quality 4H-SiC/Si heterostructures. Annealing at 1000°C significantly enhances the bonding strength and reduces the interfacial thermal resistance (ITR) by up to ~58% (from 12.140 m2K/MW to 5.079 m2K/MW), thereby substantially improving heat dissipation. Atomic-resolution electron microscopy reveals the absence of amorphous interlayers and the formation of 1–1.5 nm-thick 3C-SiC islands at the interface after annealing, both of them contribute to the enhanced thermal property. Sub-nanoscale phonon spectroscopy and atomistic simulations further clarify that these distinctive interfacial microstructures underpin the observed improvements in both mechanical and thermal performance. Our work not only achieves low ITR in 6-inch 4H-SiC/Si wafers but also provides atomic-scale insights into thermal interface engineering.