An 8–15-GHz Doherty Power Amplifier with a Compact Quadrature-Hybrid-based Output Combiner in 22nm FD-SOI

A compact 8–15 GHz Doherty power amplifier (DPA) is proposed and fabricated in 22-nm FD-SOI CMOS. The proposed DPA relies on quadrature-hybrid splitter and combiner to replace the bulky λ/4 impedance inverters at the input and the output of the conventional DPA enabling load modulation over a large fractional bandwidth (FBW=61%) with efficient and compact integration. The proposed DPA achieves a peak gain of 19.6 dB; ≥ 17 dB across 8–15 GHz, 18 dBm P1dB, 19.5 dBm Psat, and a peak PAE of 21% at 10 GHz, while sustaining 17% PAE at 6 dB back-off. The proposed DPA enables a modulation BW up to 200 MHz for a 256-QAM single carrier (SC) signal with a peak to average power ratio (PAPR) of 6 dB. Under this setting, the average output power (Pavg) is measured at 12.5 dBm with an RMS error vector magnitude (EVM) of −24.3 dB and an average PAE of 15%. Within the scope of CMOS power amplifiers in 22-nm FD-SOI, we found no published example that jointly demonstrates 8–15 GHz coverage and sustained PAE at 6 dB back-off using a quadrature hybrid.