Design of the ANTARES4 Readout ASIC for the Second Flight of the GAPS Experiment: Motivations and Requirements

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Abstract

The General AntiParticle Spectrometer (GAPS) is a balloon-borne experiment designed to search for low-energy cosmic-ray antinuclei as a potential indirect signature of dark matter. Over the course of at least three long-duration flights over Antarctica, it will explore the sub-250 MeV/n energy range with sensitivity to antideuterons and antihelium, while also extending antiproton measurements below 100 MeV. The instrument features a tracker built from more than one thousand lithium-drifted silicon detectors, each read out by a dedicated custom integrated circuit. With the first flight scheduled for the austral summer of 2025, a new prototype chip, ANTARES4, has been developed using a commercial 65 nm complementary metal-oxide semiconductor process for use in the second flight. It integrates eight independent analog channels, each incorporating a low-noise charge-sensitive amplifier with dynamic signal compression, a CR–RC shaping stage with eight selectable peaking times, and on-chip calibration circuitry. The charge-sensitive amplifier uses metal-oxide semiconductor feedback elements with voltage-dependent capacitance to support the wide input energy range from 10 keV to 100 MeV. Four alternative feedback implementations are included to compare performance and design trade-offs. Leakage current compensation up to 200 nA per detector strip is provided by a Krummenacher current-feedback network. This paper presents the design and architecture of ANTARES4, highlighting the motivations, design drivers, and performance requirements that guided its development.

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