An Area-Efficient and Low-Error FPGA-Based Sigmoid Function Approximation

Neuromorphic hardware systems allow efficient implementation of artificial neural networks (ANNs) across various applications that demand high data throughput, reduced physical size, and low energy consumption. Field-Programmable Gate Arrays (FPGAs) possess inherent features that can be aligned with these requirements. However, implementing ANNs on FPGAs also presents challenges, including the computation of the neuron activation functions, due to the balance between resource constraints and numerical precision. This paper proposes a resource-efficient hardware approximation method for the sigmoid function, utilizing a combination of first- and second-degree polynomial functions. The method aims mainly to reduce approximation error. This paper also evaluates the obtained results against existing techniques and discusses their significance. Experimental results show that the proposed implementation has a good balance between resource usage and approximation error compared to implementations proposed in related works.